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| Name | Stanford's skyscraper-style Chip Design "N3XT" boosts performance Thousand Times. |
| Video Uploader | Video From Rajamanickam Antonimuthu |
| Upload Date | This Video Uploaded At 11-12-2015 06:19:34 |
| Video Discription | For decades, engineers have designed computer systems with processors and memory chips laid out like single-story structures in a suburb. Wires connect these chips like streets, carrying digital traffic between the processors that compute data and the memory chips that store it. But suburban-style layouts create long commutes and regular traffic jams in electronic circuits, wasting time and energy. That is why researchers from three other universities are working with Stanford engineers,to create a revolutionary new high-rise architecture for computing. In Rebooting Computing, a special issue of the IEEE Computer journal, the team describes its new approach as Nano-Engineered Computing Systems Technology, or N3XT. N3XT will break data bottlenecks by integrating processors and memory like floors in a skyscraper and by connecting these components with millions of "vias," which play the role of tiny electronic elevators. The N3XT high-rise approach will move more data, much faster, using far less energy. Shifting electronics from a low-rise to a high-rise architecture will demand huge investments from industry – and the promise of big payoffs for making the switch. According to the researchers, N3XT systems outperform conventional approaches by a factor of a thousand. To enable these advances, the N3XT team uses new nano-materials that allow its designs to do what can't be done with silicon i-e building high-rise computer circuits. Engineers have previously tried to stack silicon chips but with limited success. Fabricating a silicon chip requires temperatures close to 1,800 degrees Fahrenheit, making it extremely challenging to build a silicon chip atop another without damaging the first layer. The current approach, called 3-D, or stacked, chips is to construct two silicon chips separately, then stack them and connect them with a few thousand wires. But conventional, 3-D silicon chips are still prone to traffic jams and it takes a lot of energy to push data. The N3XT team is taking a radically different approach: building layers of processors and memory directly atop one another, connected by millions of electronic elevators that can move more data over shorter distances using less energy. The N3XT approach is to immerse computation and memory storage into an electronic super-device. The key is the use of non-silicon materials that can be fabricated at much lower temperatures than silicon, so that processors can be built on top of memory without the new layer damaging the layer below. N3XT high-rise chips are based on carbon nanotube transistors (CNTs). Transistors are fundamental units of a computer processor, the tiny on-off switches that create digital zeroes and ones. CNTs are faster and more energy-efficient than silicon processors. Moreover, in the N3XT architecture, they can be fabricated and placed over and below other layers of memory. Just as skyscrapers have ventilation systems, N3XT high-rise chip designs incorporate thermal cooling layers The Team has already demonstrated a working prototype of a high-rise chip. At the International Electron Devices Meeting in December 2014 they unveiled a four-layered chip made up of two layers of RRAM memory sandwiched between two layers of CNTs. News Source: http://news.stanford.edu/pr/2015/pr-n3xt-computing-structure-120915.html Watch more Technology News at https://www.youtube.com/playlist?list=PLK2ccNIJVPpB_XqWWq_oaZGIDzmKiSkYc [Ogod1NxsWO8] |
| Category | Science & Technology |
| Tags | N3XT | Nano-Engineered Computing Systems Technology | skyscraper-style Chip Design | high-rise architecture | Nanotechnology (Field Of Study) | yt:cc=on | carbon nanotube transistors | N3XT high-rise chip |
